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author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-05-22 00:50:22 +0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-05-31 20:54:03 +0200 |
commit | eccb140bca6727f2ef849e8811d5fe4c9fbfd5dd (patch) | |
tree | 44c64e283db337fd8e7a1f8b1b06851d2d6fd613 /drivers/gpu/drm/i915/intel_dvo.c | |
parent | a01025afa89ccaf1b0521f5862cbfcc73f970481 (diff) | |
download | lwn-eccb140bca6727f2ef849e8811d5fe4c9fbfd5dd.tar.gz lwn-eccb140bca6727f2ef849e8811d5fe4c9fbfd5dd.zip |
drm/i915: hw state readout&check support for cpu_transcoder
This allows us to drop a bunch of ugly hacks and finally implement
what
commit cc464b2a17c59adedbdc02cc54341d630354edc3
Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date: Fri Jan 25 16:59:16 2013 -0200
drm/i915: set TRANSCODER_EDP even earlier
tried to achieve, but that was reverted again in
commit bba2181c49f1dddf8b592804a1b53cc1a3cf408a
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Fri Mar 22 10:53:40 2013 +0100
Revert "drm/i915: set TRANSCODER_EDP even earlier"
Now we should always have a consistent cpu_transcoder in the
pipe_config.
v2: Fix up the code as spotted by Paulo:
- read the register for real
- assign the right pipes
- break out if the hw state doesn't make sense
v3: Shut up gcc.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dvo.c')
0 files changed, 0 insertions, 0 deletions