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| author | Ramalingam C <ramalingam.c@intel.com> | 2019-02-04 21:14:40 +0530 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2019-02-07 21:45:53 +0100 |
| commit | 634852d1f468ccc8cc2e790757c6c1c0f95eb955 (patch) | |
| tree | 8d0a1d2ef4e780fc80bf9117416c49180c110df2 /drivers/gpu/drm/i915/intel_drv.h | |
| parent | c09d39166d8a3f3788680b32dbb0a40a70de32e2 (diff) | |
| download | lwn-634852d1f468ccc8cc2e790757c6c1c0f95eb955.tar.gz lwn-634852d1f468ccc8cc2e790757c6c1c0f95eb955.zip | |
drm/i915: HDCP state handling in ddi_update_pipe
The downgrade of the fullmodeset into fastset
intel_encoder->update_pipe, in possible scenario, skips the En/Dis-able
DDI. Hence breaks the HDCP state change handling.
We also don't have any hdcp tests in CI, because the shard runs don't
have hdcp capable outputs :-/
So this change fixs it by handling the HDCP state change request at
intel_encoder->update_pipe too along with enable and disable of the DDI.
Fixes: d19f958db23c ("drm/i915: Enable fastset for non-boot modesets.")
v2:
Added commit id that broke the HDCP [Daniel]
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
cc: Hans de Goede <hdegoede@redhat.com>
cc: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1549295080-18353-1-git-send-email-ramalingam.c@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
0 files changed, 0 insertions, 0 deletions