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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2013-04-12 17:57:58 -0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-04-19 09:34:27 +0200
commitde032bf40a52dbbada11e071d150d2c062b5527e (patch)
tree8fa53406c45b0f14cb257fc532473cc1faa8d386 /drivers/gpu/drm/i915/i915_irq.c
parent8664281b64c457705db72fc60143d03827e75ca9 (diff)
downloadlwn-de032bf40a52dbbada11e071d150d2c062b5527e.tar.gz
lwn-de032bf40a52dbbada11e071d150d2c062b5527e.zip
drm/i915: print Gen5+ CPU/PCH poison interrupts
This is bad news and shouldn't be happening. V2: Rebase. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index c79793ee868b..dae8953d2912 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1023,6 +1023,9 @@ static void ivb_err_int_handler(struct drm_device *dev)
struct drm_i915_private *dev_priv = dev->dev_private;
u32 err_int = I915_READ(GEN7_ERR_INT);
+ if (err_int & ERR_INT_POISON)
+ DRM_ERROR("Poison interrupt\n");
+
if (err_int & ERR_INT_FIFO_UNDERRUN_A)
if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
@@ -1043,6 +1046,9 @@ static void cpt_serr_int_handler(struct drm_device *dev)
struct drm_i915_private *dev_priv = dev->dev_private;
u32 serr_int = I915_READ(SERR_INT);
+ if (serr_int & SERR_INT_POISON)
+ DRM_ERROR("PCH poison interrupt\n");
+
if (serr_int & SERR_INT_TRANS_A_FIFO_UNDERRUN)
if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A,
false))
@@ -1261,6 +1267,9 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
if (de_iir & DE_PIPEB_VBLANK)
drm_handle_vblank(dev, 1);
+ if (de_iir & DE_POISON)
+ DRM_ERROR("Poison interrupt\n");
+
if (de_iir & DE_PIPEA_FIFO_UNDERRUN)
if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
@@ -2496,7 +2505,7 @@ static void ibx_irq_postinstall(struct drm_device *dev)
if (HAS_PCH_IBX(dev)) {
mask = SDE_GMBUS | SDE_AUX_MASK | SDE_TRANSB_FIFO_UNDER |
- SDE_TRANSA_FIFO_UNDER;
+ SDE_TRANSA_FIFO_UNDER | SDE_POISON;
} else {
mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT | SDE_ERROR_CPT;
@@ -2517,7 +2526,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE |
DE_AUX_CHANNEL_A | DE_PIPEB_FIFO_UNDERRUN |
- DE_PIPEA_FIFO_UNDERRUN;
+ DE_PIPEA_FIFO_UNDERRUN | DE_POISON;
u32 render_irqs;
dev_priv->irq_mask = ~display_mask;