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authorAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>2016-03-08 17:46:22 +0200
committerAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>2016-03-09 11:55:31 +0200
commitf9476a6c6d0c33cbce271ea08a3fbef131c73dc0 (patch)
treea3a870f8a3ce75d6bdbdf2c23ede96be2f7f59d2 /drivers/gpu/drm/i915/i915_drv.h
parent2edd6443e3d03267bfc63071a86332a1711dc1bc (diff)
downloadlwn-f9476a6c6d0c33cbce271ea08a3fbef131c73dc0.tar.gz
lwn-f9476a6c6d0c33cbce271ea08a3fbef131c73dc0.zip
drm/i915: Refactor platform specifics out of intel_get_shared_dpll()
The function intel_get_shared_dpll() had a more or less generic implementation with some platform specific checks to handle smaller differences between platforms. However, the minimalist approach forces bigger differences between platforms to be implemented outside of the shared dpll code (see the *_ddi_pll_select() functions in intel_ddi.c, for instance). This patch changes the implementation of intel_get_share_dpll() so that a completely platform specific version can be used, providing helpers to reduce code duplication. This should allow the code from the ddi pll select functions to be moved, and also make room for making more dplls managed by the shared dpll infrastructure. v2: WARN_ON(!dpll_mgr) in intel_get_shared_dpll(). (Maarten) Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1457451987-17466-9-git-send-email-ander.conselvan.de.oliveira@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e74a61bf7a11..1557d65485b0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1810,6 +1810,7 @@ struct drm_i915_private {
/* dpll and cdclk state is protected by connection_mutex */
int num_shared_dpll;
struct intel_shared_dpll shared_dplls[I915_NUM_PLLS];
+ const struct intel_dpll_mgr *dpll_mgr;
unsigned int active_crtcs;
unsigned int min_pixclk[I915_MAX_PIPES];