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author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-04-26 09:17:21 +0100 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-04-26 10:20:35 +0100 |
commit | ebb5eb7d731cc39e29661e0eb9dfe61242817663 (patch) | |
tree | ec06cf4a44a9e6f5f6d5f1453ca2d96eb13ce555 /drivers/gpu/drm/i915/i915_drv.h | |
parent | 337fa6e04d40216e9f462b23b86d9e62f93c3d48 (diff) | |
download | lwn-ebb5eb7d731cc39e29661e0eb9dfe61242817663.tar.gz lwn-ebb5eb7d731cc39e29661e0eb9dfe61242817663.zip |
drm/i915: Replace pcu_lock with sb_lock
We now have two locks for sideband access. The general one covering
sideband access across all generation, sb_lock, and a specific one
covering sideband access via the punit on vlv/chv. After lifting the
sb_lock around the punit into the callers, the pcu_lock is now redudant
and can be separated from its other use to regulate RPS (essentially
giving RPS a lock all of its own).
v2: Extract a couple of minor bug fixes.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190426081725.31217-4-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index b2215fb7f562..ca1b35d8faca 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -648,6 +648,8 @@ struct intel_rps_ei { }; struct intel_rps { + struct mutex lock; /* protects enabling and the worker */ + /* * work, interrupts_enabled and pm_iir are protected by * dev_priv->irq_lock @@ -1710,14 +1712,6 @@ struct drm_i915_private { */ u32 edram_size_mb; - /* - * Protects RPS/RC6 register access and PCU communication. - * Must be taken after struct_mutex if nested. Note that - * this lock may be held for long periods of time when - * talking to hw - so only take it when talking to hw! - */ - struct mutex pcu_lock; - /* gen6+ GT PM state */ struct intel_gen6_power_mgmt gt_pm; |