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| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2018-07-27 12:36:47 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2018-08-16 11:52:08 -0700 |
| commit | dce888798d3ed1c7fea2d45f5f757a749a9e2584 (patch) | |
| tree | ac6a569c624606e944d1a5d8382d016b36951d9b /drivers/gpu/drm/i915/i915_drv.h | |
| parent | 336662e5e3c90e2b6d4b2c2a773f87218baa8a61 (diff) | |
| download | lwn-dce888798d3ed1c7fea2d45f5f757a749a9e2584.tar.gz lwn-dce888798d3ed1c7fea2d45f5f757a749a9e2584.zip | |
drm/i915: remove confusing GPIO vs PCH_GPIO
Instead of defining all registers twice, define just a PCH_GPIO_BASE
that has the same address as PCH_GPIO_A and use that to calculate all
the others. This also brings VLV and !HAS_GMCH_DISPLAY in line, doing
the same thing.
v2: Fix GMBUS registers to be relative to gpio base; create GPIO()
macro to return a particular gpio address and move the enum out of
i915_reg.h (suggested by Jani)
v3: Move base offset inside the GPIO() macro so the GMBUS defines don't
actually need to be changed (suggested by Daniel/Ville)
v4: Move definition of i915_gpio to intel_display.h and remove
GMBUS/GPIO handling from gvt since now they have their own
defines.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180727193647.8639-3-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 74482753a04e..e5b9d3c77139 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1643,7 +1643,8 @@ struct drm_i915_private { struct mutex gmbus_mutex; /** - * Base address of the gmbus and gpio block. + * Base address of where the gmbus and gpio blocks are located (either + * on PCH or on SoC for platforms without PCH). */ uint32_t gpio_mmio_base; |