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authorBen Widawsky <benjamin.widawsky@intel.com>2013-09-17 21:12:44 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-09-19 20:38:00 +0200
commitc3787e2eac816a597a7f92daa5d0629a85e77d56 (patch)
tree7d9231ee10caed1a7d07c7fff04c03d8855bd033 /drivers/gpu/drm/i915/i915_drv.h
parent35a85ac60618521d41cfdb14f3fbfc8ad7329e9e (diff)
downloadlwn-c3787e2eac816a597a7f92daa5d0629a85e77d56.tar.gz
lwn-c3787e2eac816a597a7f92daa5d0629a85e77d56.zip
drm/i915: Make l3 remapping use the ring
Using LRI for setting the remapping registers allows us to stream l3 remapping information. This is necessary to handle per context remaps as we'll see implemented in an upcoming patch. Using the ring also means we don't need to frob the DOP clock gating bits. v2: Add comment about lack of worry for concurrent register access (Daniel) Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> [danvet: Bikeshed the comment a bit by doing a s/XXX/Note - there's nothing to fix.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c6e8df737566..0c39805b881e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1949,7 +1949,7 @@ bool i915_gem_clflush_object(struct drm_i915_gem_object *obj, bool force);
int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj);
int __must_check i915_gem_init(struct drm_device *dev);
int __must_check i915_gem_init_hw(struct drm_device *dev);
-void i915_gem_l3_remap(struct drm_device *dev, int slice);
+int i915_gem_l3_remap(struct intel_ring_buffer *ring, int slice);
void i915_gem_init_swizzling(struct drm_device *dev);
void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
int __must_check i915_gpu_idle(struct drm_device *dev);