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authorChris Wilson <chris@chris-wilson.co.uk>2014-07-10 20:31:18 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-07-10 22:30:27 +0200
commitbf225f20d51fb1b77d47fce0628159a3eda027b9 (patch)
tree7b70655f06122d2b7f00b5324792ffef0d283c20 /drivers/gpu/drm/i915/i915_drv.h
parent755f68f4f32fc690957cfc94a19fff3139958299 (diff)
downloadlwn-bf225f20d51fb1b77d47fce0628159a3eda027b9.tar.gz
lwn-bf225f20d51fb1b77d47fce0628159a3eda027b9.zip
drm/i915: Move RPS evaluation interval counters to i915->rps
Place the RPS counters inside the RPS struct. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h18
1 files changed, 7 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 647ea67d0b1d..263a8799eb59 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -902,10 +902,10 @@ struct vlv_s0ix_state {
u32 clock_gate_dis2;
};
-struct intel_rps_ei_calc {
- u32 cz_ts_ei;
- u32 render_ei_c0;
- u32 media_ei_c0;
+struct intel_rps_ei {
+ u32 cz_clock;
+ u32 render_c0;
+ u32 media_c0;
};
struct intel_gen6_power_mgmt {
@@ -940,6 +940,9 @@ struct intel_gen6_power_mgmt {
bool enabled;
struct delayed_work delayed_resume_work;
+ /* manual wa residency calculations */
+ struct intel_rps_ei up_ei, down_ei;
+
/*
* Protects RPS/RC6 register access and PCU communication.
* Must be taken after struct_mutex if nested.
@@ -1534,13 +1537,6 @@ struct drm_i915_private {
/* gen6+ rps state */
struct intel_gen6_power_mgmt rps;
- /* rps wa up ei calculation */
- struct intel_rps_ei_calc rps_up_ei;
-
- /* rps wa down ei calculation */
- struct intel_rps_ei_calc rps_down_ei;
-
-
/* ilk-only ips/rps state. Everything in here is protected by the global
* mchdev_lock in intel_pm.c */
struct intel_ilk_power_mgmt ips;