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authorChris Wilson <chris@chris-wilson.co.uk>2016-10-28 13:58:24 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2016-10-28 20:53:41 +0100
commitb52992c06c9020cecb1b9807855301e5f62ec968 (patch)
treebd24627a7d623d1e646c54aca199825e501c7c24 /drivers/gpu/drm/i915/i915_drv.h
parentfc0990903c479ecafc67f7bf030c68b19215f2d5 (diff)
downloadlwn-b52992c06c9020cecb1b9807855301e5f62ec968.tar.gz
lwn-b52992c06c9020cecb1b9807855301e5f62ec968.zip
drm/i915: Support asynchronous waits on struct fence from i915_gem_request
We will need to wait on DMA completion (as signaled via struct fence) before executing our i915_gem_request. Therefore we want to expose a method for adding the await on the fence itself to the request. v2: Add a comment detailing a failure to handle a signal-on-any fence-array. v3: Pretend that magic numbers don't exist. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161028125858.23563-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 930503aac46d..e95352cc5ac2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1423,6 +1423,9 @@ struct i915_error_state_file_priv {
struct drm_i915_error_state *error;
};
+#define I915_RESET_TIMEOUT (10 * HZ) /* 10s */
+#define I915_FENCE_TIMEOUT (10 * HZ) /* 10s */
+
struct i915_gpu_error {
/* For hangcheck timer */
#define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */