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author | Chris Wilson <chris@chris-wilson.co.uk> | 2012-04-21 16:23:23 +0100 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-05-03 11:18:06 +0200 |
commit | 5d82e3e6427d407e5e4713a2f73210b4e7801ad3 (patch) | |
tree | 15195b0bf801467db545342481d1b793bff09776 /drivers/gpu/drm/i915/i915_drv.h | |
parent | 38de45c5fc61a4a6b2f0b4b7c9ae9f32f058f420 (diff) | |
download | lwn-5d82e3e6427d407e5e4713a2f73210b4e7801ad3.tar.gz lwn-5d82e3e6427d407e5e4713a2f73210b4e7801ad3.zip |
drm/i915: Clarify the semantics of tiling_changed
Rename obj->tiling_changed to obj->fence_dirty so that it is clear that
it flags when the parameters for an active fence (including the
no-fence) register are changed.
Also, do not set this flag when the object does not have a fence
register allocated currently and the gpu does not depend upon the
unfence. This case works exactly like when a tiled object lost its
fence and hence does not need additional handling for the tiling
change in the code.
v2: Use fence_dirty to better express what the flag tracks and add a few
more details to the comments to serve as a reminder of how the GPU also
uses the unfenced register slot.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: Add some bikeshed to the commit message about the stricter
use of fence_dirty.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 4cbc45f0424f..faea1b656821 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -869,7 +869,14 @@ struct drm_i915_gem_object { * Current tiling mode for the object. */ unsigned int tiling_mode:2; - unsigned int tiling_changed:1; + /** + * Whether the tiling parameters for the currently associated fence + * register have changed. Note that for the purposes of tracking + * tiling changes we also treat the unfenced register, the register + * slot that the object occupies whilst it executes a fenced + * command (such as BLT on gen2/3), as a "fence". + */ + unsigned int fence_dirty:1; /** How many users have pinned this object in GTT space. The following * users can each hold at most one reference: pwrite/pread, pin_ioctl |