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author | Maarten Lankhorst <maarten.lankhorst@linux.intel.com> | 2015-06-15 12:33:56 +0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-06-22 14:28:37 +0200 |
commit | 27c329ed16ddf5540151dfa9d22c584b819e0718 (patch) | |
tree | 13aae91cb338366c5f6d6dd130d9880cc7fae933 /drivers/gpu/drm/i915/i915_drv.h | |
parent | c389c9c4d981e49185b1c89354c85608effefe50 (diff) | |
download | lwn-27c329ed16ddf5540151dfa9d22c584b819e0718.tar.gz lwn-27c329ed16ddf5540151dfa9d22c584b819e0718.zip |
drm/i915: Make cdclk part of the atomic state.
The skylake scalers depend on the cdclk freq, but that frequency can
change during a modeset. So when a modeset happens calculate the new
cdclk in the atomic state. With the transitional helpers gone the
cached value can be used in the scaler, and committed after all
crtc's are disabled.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90874
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 290017857c6d..3e36af90f943 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -619,7 +619,8 @@ struct drm_i915_display_funcs { struct drm_crtc *crtc, uint32_t sprite_width, uint32_t sprite_height, int pixel_size, bool enable, bool scaled); - void (*modeset_global_resources)(struct drm_atomic_state *state); + int (*modeset_calc_cdclk)(struct drm_atomic_state *state); + void (*modeset_commit_cdclk)(struct drm_atomic_state *state); /* Returns the active state of the crtc, and if the crtc is active, * fills out the pipe-config with the hw state. */ bool (*get_pipe_config)(struct intel_crtc *, |