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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-12-16 02:38:07 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2023-01-13 16:55:00 +0200 |
| commit | f021dfd232317dd149d3aea09f5d7b7853d00caf (patch) | |
| tree | 752eda9de73e6c86170b2ff0fe3623a1247bde66 /drivers/gpu/drm/i915/display/intel_dsb.h | |
| parent | e485a3e6a2d22580ea70c27fc66474f5a28165fc (diff) | |
| download | lwn-f021dfd232317dd149d3aea09f5d7b7853d00caf.tar.gz lwn-f021dfd232317dd149d3aea09f5d7b7853d00caf.zip | |
drm/i915/dsb: Allow the caller to pass in the DSB buffer size
The caller should more or less know how many DSB commands it
wants to emit into the command buffer, so allow it to specify
the size of the command buffer rather than having the low level
DSB code guess it.
Technically we can emit as many as 134+1033 (for adl+ degamma +
10bit gamma) register writes but thanks to the DSB indexed register
write command we get significant space savings so the current size
estimate of 8KiB (~1024 DSB commands) is sufficient for now.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221216003810.13338-11-ville.syrjala@linux.intel.com
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dsb.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dsb.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h index 25d774049cc2..05c221b6d0a4 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.h +++ b/drivers/gpu/drm/i915/display/intel_dsb.h @@ -13,7 +13,8 @@ struct intel_crtc; struct intel_dsb; -struct intel_dsb *intel_dsb_prepare(struct intel_crtc *crtc); +struct intel_dsb *intel_dsb_prepare(struct intel_crtc *crtc, + unsigned int max_cmds); void intel_dsb_cleanup(struct intel_dsb *dsb); void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val); |