diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-12-16 02:38:05 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2023-01-13 16:54:03 +0200 |
| commit | 2f65fb5466b498982b2f820f3c06dd28b84110aa (patch) | |
| tree | 39a3b6a8215b7cf20bab2fe721bd22c0802d198c /drivers/gpu/drm/i915/display/intel_dsb.h | |
| parent | 08b462fd841205a807e4bc0ba58aed7e90ec8bad (diff) | |
| download | lwn-2f65fb5466b498982b2f820f3c06dd28b84110aa.tar.gz lwn-2f65fb5466b498982b2f820f3c06dd28b84110aa.zip | |
drm/i915/dsb: Handle the indexed vs. not inside the DSB code
The DSB indexed register write insturction is purely an internal
DSB implementation detail, no reason why the caller should have to
know about it. So let's just have the caller emit blind register
writes let the DSB code convert things to an indexed write if/when
multiple writes occur to the same register offset in a row.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221216003810.13338-9-ville.syrjala@linux.intel.com
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dsb.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dsb.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h index 25f13c4d5389..25d774049cc2 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.h +++ b/drivers/gpu/drm/i915/display/intel_dsb.h @@ -17,8 +17,6 @@ struct intel_dsb *intel_dsb_prepare(struct intel_crtc *crtc); void intel_dsb_cleanup(struct intel_dsb *dsb); void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val); -void intel_dsb_indexed_reg_write(struct intel_dsb *dsb, - i915_reg_t reg, u32 val); void intel_dsb_commit(struct intel_dsb *dsb); #endif |