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author | Mihail Atanassov <mihail.atanassov@arm.com> | 2017-01-23 15:24:35 +0000 |
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committer | Liviu Dudau <Liviu.Dudau@arm.com> | 2017-01-26 15:46:19 +0000 |
commit | 83d642ee6dbec57ef1639a3de1e383fbfc5c44ec (patch) | |
tree | c0bdb4752227b0aab0d124f1d4b17130dd7a0229 /drivers/gpu/drm/arm/malidp_hw.h | |
parent | b70b332f14b704b22894571bc422812f539aea4f (diff) | |
download | lwn-83d642ee6dbec57ef1639a3de1e383fbfc5c44ec.tar.gz lwn-83d642ee6dbec57ef1639a3de1e383fbfc5c44ec.zip |
drm: mali-dp: fix stride setting for multi-plane formats
Hardware has multiple (2 or 3, depending on model) stride
registers per layer; add a function that correctly takes that
into account. On hardware that only has 2 stride registers,
ensure that 3-plane (YUV) content has identical strides
for both chroma planes.
Signed-off-by: Mihail Atanassov <mihail.atanassov@arm.com>
[Removed smart layer stride setup, comment and commit message clarifications]
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Diffstat (limited to 'drivers/gpu/drm/arm/malidp_hw.h')
-rw-r--r-- | drivers/gpu/drm/arm/malidp_hw.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/arm/malidp_hw.h b/drivers/gpu/drm/arm/malidp_hw.h index 4f8c884d1960..00974b59407d 100644 --- a/drivers/gpu/drm/arm/malidp_hw.h +++ b/drivers/gpu/drm/arm/malidp_hw.h @@ -58,6 +58,7 @@ struct malidp_layer { u16 id; /* layer ID */ u16 base; /* address offset for the register bank */ u16 ptr; /* address offset for the pointer register */ + u16 stride_offset; /* Offset to the first stride register. */ }; /* regmap features */ @@ -93,6 +94,10 @@ struct malidp_hw_regmap { const u8 bus_align_bytes; }; +/* device features */ +/* Unlike DP550/650, DP500 has 3 stride registers in its video layer. */ +#define MALIDP_DEVICE_LV_HAS_3_STRIDES BIT(0) + struct malidp_hw_device { const struct malidp_hw_regmap map; void __iomem *regs; |