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authorJosip Pavic <Josip.Pavic@amd.com>2025-01-07 11:00:11 -0500
committerAlex Deucher <alexander.deucher@amd.com>2025-02-12 21:02:57 -0500
commit06b0a4ad7162b9dd7e52dbec320ea9d080d9e551 (patch)
tree103116adfff6539939a3a886eea8003e566fbc73 /drivers/gpu/drm/amd/display/dc/optc/dcn30
parent6eb4c13a38457c7ff41bbfa7638f34cfda29c662 (diff)
downloadlwn-06b0a4ad7162b9dd7e52dbec320ea9d080d9e551.tar.gz
lwn-06b0a4ad7162b9dd7e52dbec320ea9d080d9e551.zip
drm/amd/display: log destination of vertical interrupt
[Why] Knowing the destination of OTG's vertical interrupt 2 is useful for debugging, but it is not currently included in the OTG state readback logic [How] Read the OTG interrupt destination register to get the vertical interrupt 2 destination on ASICs that have this register when reading back the OTG state from hardware Reviewed-by: Sung Lee <sung.lee@amd.com> Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/optc/dcn30')
-rw-r--r--drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c b/drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c
index 4c95c0958612..78b58a449fa4 100644
--- a/drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c
@@ -420,6 +420,7 @@ static struct timing_generator_funcs dcn30_tg_funcs = {
.get_optc_double_buffer_pending = optc3_get_optc_double_buffer_pending,
.get_otg_double_buffer_pending = optc3_get_otg_update_pending,
.get_pipe_update_pending = optc3_get_pipe_update_pending,
+ .read_otg_state = optc1_read_otg_state,
};
void dcn30_timing_generator_init(struct optc *optc1)