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authorIsabel Zhang <isabel.zhang@amd.com>2020-10-23 11:55:32 -0400
committerAlex Deucher <alexander.deucher@amd.com>2020-11-10 14:24:48 -0500
commitfa896813b441115545349752e15a7d66f3fa2240 (patch)
treeb269080b41e6f021501e3ded7bc2bfce0694c2f5 /drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
parent103cd0b1295c2bad29d5a6bc3ec4efc7d7fcd840 (diff)
downloadlwn-fa896813b441115545349752e15a7d66f3fa2240.tar.gz
lwn-fa896813b441115545349752e15a7d66f3fa2240.zip
drm/amd/display: Prevent freesync power optimization during validation
[Why] Due to the freesync power optimization increasing vtotal, the driver believes that MPO is supported. MPO is turned on. Freesync then exits, MPO can no longer be supported and immediate flip fails. This causes corruption on the panel. [How] Avoid the freesync optimization when doing validation so in the case freesync exits, driver can still support the configuration. Signed-off-by: Isabel Zhang <isabel.zhang@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
index 01ac8b2921c6..c8851853843a 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
@@ -1451,12 +1451,13 @@ static struct clock_source *dcn30_clock_source_create(
int dcn30_populate_dml_pipes_from_context(
struct dc *dc, struct dc_state *context,
- display_e2e_pipe_params_st *pipes)
+ display_e2e_pipe_params_st *pipes,
+ bool fast_validate)
{
int i, pipe_cnt;
struct resource_context *res_ctx = &context->res_ctx;
- dcn20_populate_dml_pipes_from_context(dc, context, pipes);
+ dcn20_populate_dml_pipes_from_context(dc, context, pipes, fast_validate);
for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) {
if (!res_ctx->pipe_ctx[i].stream)
@@ -1996,7 +1997,7 @@ static bool dcn30_internal_validate_bw(
if (!pipes)
return false;
- pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes);
+ pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, fast_validate);
if (!pipe_cnt) {
out = true;
@@ -2210,7 +2211,7 @@ static bool dcn30_internal_validate_bw(
}
if (repopulate_pipes)
- pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes);
+ pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, fast_validate);
*vlevel_out = vlevel;
*pipe_cnt_out = pipe_cnt;