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authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>2020-08-06 15:48:10 -0400
committerAlex Deucher <alexander.deucher@amd.com>2020-08-06 15:48:54 -0400
commit8ce5d8425d39eb9197e30bcffc5afbaa7079b723 (patch)
treec5b67fb909f1d4e4c990cf3082dba4e94fe8815a /drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
parentcf322b49c9e8fe41e5c9d0b5e57eee84085da553 (diff)
downloadlwn-8ce5d8425d39eb9197e30bcffc5afbaa7079b723.tar.gz
lwn-8ce5d8425d39eb9197e30bcffc5afbaa7079b723.zip
drm/amd/display: Use validated tiling_flags and tmz_surface in commit_tail
[Why] So we're not racing with userspace or deadlocking DM. [How] These flags are now stored on dm_plane_state itself and acquried and validated during commit_check, so just use those instead. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c')
-rw-r--r--drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c17
1 files changed, 3 insertions, 14 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 03534ff0c895..c3ac47b835d6 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -7012,8 +7012,6 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
long r;
unsigned long flags;
struct amdgpu_bo *abo;
- uint64_t tiling_flags;
- bool tmz_surface = false;
uint32_t target_vblank, last_flip_vblank;
bool vrr_active = amdgpu_dm_vrr_active(acrtc_state);
bool pflip_present = false;
@@ -7097,21 +7095,12 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
if (unlikely(r <= 0))
DRM_ERROR("Waiting for fences timed out!");
- /*
- * We cannot reserve buffers here, which means the normal flag
- * access functions don't work. Paper over this with READ_ONCE,
- * but maybe the flags are invariant enough that not even that
- * would be needed.
- */
- tiling_flags = READ_ONCE(abo->tiling_flags);
- tmz_surface = READ_ONCE(abo->flags) & AMDGPU_GEM_CREATE_ENCRYPTED;
-
fill_dc_plane_info_and_addr(
- dm->adev, new_plane_state, tiling_flags,
+ dm->adev, new_plane_state,
+ dm_new_plane_state->tiling_flags,
&bundle->plane_infos[planes_count],
&bundle->flip_addrs[planes_count].address,
- tmz_surface,
- false);
+ dm_new_plane_state->tmz_surface, false);
DRM_DEBUG_DRIVER("plane: id=%d dcc_en=%d\n",
new_plane_state->plane->index,