diff options
| author | Zhan Liu <Zhan.Liu@amd.com> | 2021-11-08 19:31:00 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-11-22 14:59:13 -0500 |
| commit | 1edf5ae1fdaffb67c1b93e98df670cbe535d13cf (patch) | |
| tree | 6a2e2ea33778239bf44eb5a769dc6ba147e8a31f /drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | |
| parent | 85fb8bb9d4a5bae9d1abd0d21550517a40ba81e9 (diff) | |
| download | lwn-1edf5ae1fdaffb67c1b93e98df670cbe535d13cf.tar.gz lwn-1edf5ae1fdaffb67c1b93e98df670cbe535d13cf.zip | |
drm/amd/display: enable seamless boot for DCN301
[Why]
DCN301 is capable of running seamless boot
if keep_stolen_vga_memory is not set.
[How]
Add a helper to check whether an ASIC can support
seamless boot and set it based on base driver flags.
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Zhan Liu <Zhan.Liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 3845d7eb737f..6aadb1bf0431 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -1454,6 +1454,12 @@ static int amdgpu_dm_init(struct amdgpu_device *adev) init_data.flags.power_down_display_on_boot = true; + if (check_seamless_boot_capability(adev)) { + init_data.flags.power_down_display_on_boot = false; + init_data.flags.allow_seamless_boot_optimization = true; + DRM_INFO("Seamless boot condition check passed\n"); + } + INIT_LIST_HEAD(&adev->dm.da_list); /* Display Core create. */ adev->dm.dc = dc_create(&init_data); @@ -11616,3 +11622,24 @@ int amdgpu_dm_process_dmub_aux_transfer_sync(bool is_cmd_aux, struct dc_context ctx, DMUB_ASYNC_TO_SYNC_ACCESS_SUCCESS, (uint32_t *)operation_result); } + +/* + * Check whether seamless boot is supported. + * + * So far we only support seamless boot on CHIP_VANGOGH. + * If everything goes well, we may consider expanding + * seamless boot to other ASICs. + */ +bool check_seamless_boot_capability(struct amdgpu_device *adev) +{ + switch (adev->asic_type) { + case CHIP_VANGOGH: + if (!adev->mman.keep_stolen_vga_memory) + return true; + break; + default: + break; + } + + return false; +} |