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author | Leo Liu <leo.liu@amd.com> | 2018-07-04 13:43:38 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-07-10 14:18:47 -0500 |
commit | d02f16058e661608566e444e1a433db8b0a32c0b (patch) | |
tree | 90f586aa43a02de0adfa55ae5f46dfd3febedc9c /drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | |
parent | 7b4e54a9729d0a57cf036af801aa1e78ef315982 (diff) | |
download | lwn-d02f16058e661608566e444e1a433db8b0a32c0b.tar.gz lwn-d02f16058e661608566e444e1a433db8b0a32c0b.zip |
drm/amdgpu: move cache window setup after power and clock resume
To make register read/write reliable
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c index b82c92084b6f..ca4265bc10b9 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c @@ -600,12 +600,12 @@ static int vcn_v1_0_start(struct amdgpu_device *adev) /* disable byte swapping */ lmi_swap_cntl = 0; - vcn_v1_0_mc_resume(adev); - vcn_1_0_disable_static_power_gating(adev); /* disable clock gating */ vcn_v1_0_disable_clock_gating(adev); + vcn_v1_0_mc_resume(adev); + /* disable interupt */ WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_MASTINT_EN), 0, ~UVD_MASTINT_EN__VCPU_EN_MASK); |