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author | Alex Deucher <alexander.deucher@amd.com> | 2017-12-08 13:07:58 -0500 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2017-12-13 17:28:07 -0500 |
commit | bf383fb64e7c8ccc96d382e38e829737389708a7 (patch) | |
tree | ddc3dba79d8a6fda4441bcc6aee1a46a5ee5e39a /drivers/gpu/drm/amd/amdgpu/nbio_v7_0.h | |
parent | 74e1d67c73b93634ce2436c10688a7cfea68678e (diff) | |
download | lwn-bf383fb64e7c8ccc96d382e38e829737389708a7.tar.gz lwn-bf383fb64e7c8ccc96d382e38e829737389708a7.zip |
drm/amdgpu: convert nbio to use callbacks (v2)
Cleans up and consolidates all of the per-asic logic.
v2: squash in "drm/amdgpu: fix NULL err for sriov detect" (Chunming)
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/nbio_v7_0.h')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/nbio_v7_0.h | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.h b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.h index 070c3bdf5739..508d549c5029 100644 --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.h +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.h @@ -26,25 +26,6 @@ #include "soc15_common.h" -extern const struct nbio_hdp_flush_reg nbio_v7_0_hdp_flush_reg; extern const struct amdgpu_nbio_funcs nbio_v7_0_funcs; -int nbio_v7_0_init(struct amdgpu_device *adev); -u32 nbio_v7_0_get_atombios_scratch_regs(struct amdgpu_device *adev, - uint32_t idx); -void nbio_v7_0_set_atombios_scratch_regs(struct amdgpu_device *adev, - uint32_t idx, uint32_t val); -void nbio_v7_0_mc_access_enable(struct amdgpu_device *adev, bool enable); -void nbio_v7_0_hdp_flush(struct amdgpu_device *adev); -u32 nbio_v7_0_get_memsize(struct amdgpu_device *adev); -void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instance, - bool use_doorbell, int doorbell_index); -void nbio_v7_0_enable_doorbell_aperture(struct amdgpu_device *adev, - bool enable); -void nbio_v7_0_ih_doorbell_range(struct amdgpu_device *adev, - bool use_doorbell, int doorbell_index); -void nbio_v7_0_ih_control(struct amdgpu_device *adev); -u32 nbio_v7_0_get_rev_id(struct amdgpu_device *adev); -void nbio_v7_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, - bool enable); #endif |