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| author | Jinzhou Su <Jinzhou.Su@amd.com> | 2021-04-12 15:45:31 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-04-15 16:32:44 -0400 |
| commit | b45fdeab45bc42c2cd2dfbb3d11a3dd797907af6 (patch) | |
| tree | 80e1f08bceafd75e2d69052e71b31ae77aeb8ed8 /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | |
| parent | 0133840fba2de9d70c6e092dd9701b0be317347f (diff) | |
| download | lwn-b45fdeab45bc42c2cd2dfbb3d11a3dd797907af6.tar.gz lwn-b45fdeab45bc42c2cd2dfbb3d11a3dd797907af6.zip | |
drm/amdgpu: Add graphics cache rinse packet for sdma
Add emit mem sync callback for sdma_v5_2
In amdgpu sync object test, three threads created jobs
to send GFX IB and SDMA IB in sequence. After the first
GFX thread joined, sometimes the third thread will reuse
the same physical page to store the SDMA IB. There will
be a risk that SDMA will read GFX IB in the previous physical
page. So it's better to flush the cache before commit sdma IB.
Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
0 files changed, 0 insertions, 0 deletions