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authorLijo Lazar <lijo.lazar@amd.com>2020-11-28 17:06:54 +0800
committerAlex Deucher <alexander.deucher@amd.com>2021-03-23 22:56:14 -0400
commit8738a82b37d32a816eb5874a65e218e7ef2a777a (patch)
tree088762e440fe8768a5a0b7b022f2c201d8905b61 /drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
parentb1138d5ec0e12af11fd0daac5153ec6c17c18f9d (diff)
downloadlwn-8738a82b37d32a816eb5874a65e218e7ef2a777a.tar.gz
lwn-8738a82b37d32a816eb5874a65e218e7ef2a777a.zip
drm/amd/amdgpu: Add smu_pptable module parameter
Temporarily add smu_pptable module parameter for aldebaran.This is used to force soft PPTable use overriding any VBIOS PPTable. Signed-off-by: Lijo Lazar <Lijo.Lazar@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index fbef0ea82a18..7294a8062a93 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -146,6 +146,7 @@ int amdgpu_compute_multipipe = -1;
int amdgpu_gpu_recovery = -1; /* auto */
int amdgpu_emu_mode;
uint amdgpu_smu_memory_pool_size;
+int amdgpu_smu_pptable_id = -1;
/*
* FBC (bit 0) disabled by default
* MULTI_MON_PP_MCLK_SWITCH (bit 1) enabled by default
@@ -828,6 +829,15 @@ module_param_named(bad_page_threshold, amdgpu_bad_page_threshold, int, 0444);
MODULE_PARM_DESC(num_kcq, "number of kernel compute queue user want to setup (8 if set to greater than 8 or less than 0, only affect gfx 8+)");
module_param_named(num_kcq, amdgpu_num_kcq, int, 0444);
+/**
+ * DOC: smu_pptable_id (int)
+ * Used to override pptable id. id = 0 use VBIOS pptable.
+ * id > 0 use the soft pptable with specicfied id.
+ */
+MODULE_PARM_DESC(smu_pptable_id,
+ "specify pptable id to be used (-1 = auto(default) value, 0 = use pptable from vbios, > 0 = soft pptable id)");
+module_param_named(smu_pptable_id, amdgpu_smu_pptable_id, int, 0444);
+
static const struct pci_device_id pciidlist[] = {
#ifdef CONFIG_DRM_AMDGPU_SI
{0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},