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| author | Hawking Zhang <Hawking.Zhang@amd.com> | 2018-07-31 15:00:40 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-20 21:24:54 -0500 |
| commit | 51bcce4621d86b71d75f8f493d65e83b72748fce (patch) | |
| tree | a529bdafbd603419739106603a986a1d559ed5f5 /drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | |
| parent | 53b2fe415fb161b25efa685d89848db273e4ea42 (diff) | |
| download | lwn-51bcce4621d86b71d75f8f493d65e83b72748fce.tar.gz lwn-51bcce4621d86b71d75f8f493d65e83b72748fce.zip | |
drm/amdgpu: add module parameter for async_gfx_ring enablement
0 means disable async_gfx_ring and is the default setting
1 means enable async_gfx_ring
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <jack.xiao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index f4d221ea5779..7a2ba2b420d8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -136,6 +136,7 @@ int amdgpu_emu_mode = 0; uint amdgpu_smu_memory_pool_size = 0; /* FBC (bit 0) disabled by default*/ uint amdgpu_dc_feature_mask = 0; +int amdgpu_async_gfx_ring = 0; struct amdgpu_mgpu_info mgpu_info = { .mutex = __MUTEX_INITIALIZER(mgpu_info.mutex), @@ -565,6 +566,14 @@ MODULE_PARM_DESC(smu_memory_pool_size, "0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte"); module_param_named(smu_memory_pool_size, amdgpu_smu_memory_pool_size, uint, 0444); +/** + * DOC: async_gfx_ring (int) + * It is used to enable gfx rings that could be configured with different prioritites or equal priorities + */ +MODULE_PARM_DESC(async_gfx_ring, + "Asynchronous GFX rings that could be configured with either different priorities (HP3D ring and LP3D ring), or equal priorities (0 = disabled (default), 1 = enabled)"); +module_param_named(async_gfx_ring, amdgpu_async_gfx_ring, int, 0444); + #ifdef CONFIG_HSA_AMD /** * DOC: sched_policy (int) |