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| author | Dave Jiang <dave.jiang@intel.com> | 2020-10-30 08:49:06 -0700 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2020-11-09 17:17:46 +0530 |
| commit | 5a71270197f39ff3e526cf130bc5d6e84db8f2d7 (patch) | |
| tree | 199b53ce5a48e8638095a9bfafedbe752b31b900 /drivers/dma/idxd/registers.h | |
| parent | 4749f51ddd8aee5c7aa11e6593a54f96374a77ad (diff) | |
| download | lwn-5a71270197f39ff3e526cf130bc5d6e84db8f2d7.tar.gz lwn-5a71270197f39ff3e526cf130bc5d6e84db8f2d7.zip | |
dmaengine: idxd: Update calculation of group offset to be more readable
Create helper macros to make group offset calculation more readable.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/160407294683.839093.10740868559754142070.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/idxd/registers.h')
| -rw-r--r-- | drivers/dma/idxd/registers.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/dma/idxd/registers.h b/drivers/dma/idxd/registers.h index 1041c2779f9b..6f2f736097e5 100644 --- a/drivers/dma/idxd/registers.h +++ b/drivers/dma/idxd/registers.h @@ -356,4 +356,22 @@ union wqcfg { #define WQCFG_STRIDES(_idxd_dev) ((_idxd_dev)->wqcfg_size / sizeof(u32)) +#define GRPCFG_SIZE 64 +#define GRPWQCFG_STRIDES 4 + +/* + * This macro calculates the offset into the GRPCFG register + * idxd - struct idxd * + * n - wq id + * ofs - the index of the 32b dword for the config register + * + * The WQCFG register block is divided into groups per each wq. The n index + * allows us to move to the register group that's for that particular wq. + * Each register is 32bits. The ofs gives us the number of register to access. + */ +#define GRPWQCFG_OFFSET(idxd_dev, n, ofs) ((idxd_dev)->grpcfg_offset +\ + (n) * GRPCFG_SIZE + sizeof(u64) * (ofs)) +#define GRPENGCFG_OFFSET(idxd_dev, n) ((idxd_dev)->grpcfg_offset + (n) * GRPCFG_SIZE + 32) +#define GRPFLGCFG_OFFSET(idxd_dev, n) ((idxd_dev)->grpcfg_offset + (n) * GRPCFG_SIZE + 40) + #endif |