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| author | Dan Williams <dan.j.williams@intel.com> | 2022-05-26 12:15:25 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2022-07-10 10:10:30 -0700 |
| commit | cc2a4878700b2467f36e03f581a0a877ae6a568d (patch) | |
| tree | 735495d6c22d8060fe2212631050aaa37e08d75a /drivers/cxl/core | |
| parent | 9b99ecf5a316f056d7139fa76198c8a2297846d1 (diff) | |
| download | lwn-cc2a4878700b2467f36e03f581a0a877ae6a568d.tar.gz lwn-cc2a4878700b2467f36e03f581a0a877ae6a568d.zip | |
cxl/mem: Add a debugfs version of 'iomem' for DPA, 'dpamem'
Dump the device-physical-address map for a CXL expander in /proc/iomem
style format. E.g.:
cat /sys/kernel/debug/cxl/mem1/dpamem
00000000-0fffffff : ram
10000000-1fffffff : pmem
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/165603885318.551046.8308248564880066726.stgit@dwillia2-xfh
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl/core')
| -rw-r--r-- | drivers/cxl/core/hdm.c | 25 | ||||
| -rw-r--r-- | drivers/cxl/core/port.c | 1 |
2 files changed, 26 insertions, 0 deletions
diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c index ee5dfad94ada..62771e21e2d1 100644 --- a/drivers/cxl/core/hdm.c +++ b/drivers/cxl/core/hdm.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* Copyright(c) 2022 Intel Corporation. All rights reserved. */ #include <linux/io-64-nonatomic-hi-lo.h> +#include <linux/seq_file.h> #include <linux/device.h> #include <linux/delay.h> @@ -16,6 +17,8 @@ * for enumerating these registers and capabilities. */ +static DECLARE_RWSEM(cxl_dpa_rwsem); + static int add_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld, int *target_map) { @@ -128,6 +131,28 @@ struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port) } EXPORT_SYMBOL_NS_GPL(devm_cxl_setup_hdm, CXL); +static void __cxl_dpa_debug(struct seq_file *file, struct resource *r, int depth) +{ + unsigned long long start = r->start, end = r->end; + + seq_printf(file, "%*s%08llx-%08llx : %s\n", depth * 2, "", start, end, + r->name); +} + +void cxl_dpa_debug(struct seq_file *file, struct cxl_dev_state *cxlds) +{ + struct resource *p1, *p2; + + down_read(&cxl_dpa_rwsem); + for (p1 = cxlds->dpa_res.child; p1; p1 = p1->sibling) { + __cxl_dpa_debug(file, p1, 0); + for (p2 = p1->child; p2; p2 = p2->sibling) + __cxl_dpa_debug(file, p2, 1); + } + up_read(&cxl_dpa_rwsem); +} +EXPORT_SYMBOL_NS_GPL(cxl_dpa_debug, CXL); + static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld, int *target_map, void __iomem *hdm, int which) { diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index eecebd66416d..9175d30e1755 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -1506,6 +1506,7 @@ struct dentry *cxl_debugfs_create_dir(const char *dir) { return debugfs_create_dir(dir, cxl_debugfs); } +EXPORT_SYMBOL_NS_GPL(cxl_debugfs_create_dir, CXL); static __init int cxl_core_init(void) { |