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| author | Dan Williams <dan.j.williams@intel.com> | 2021-08-02 10:29:49 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2021-08-06 08:22:53 -0700 |
| commit | 06737cd0d216be1cf6e8052e4fca0d391298f184 (patch) | |
| tree | 76c8172133fa52148d271c10d238a8b503089292 /drivers/cxl/core/core.h | |
| parent | 95aaed266801a801add6d17cd3a4f7deb610af2e (diff) | |
| download | lwn-06737cd0d216be1cf6e8052e4fca0d391298f184.tar.gz lwn-06737cd0d216be1cf6e8052e4fca0d391298f184.zip | |
cxl/core: Move pmem functionality
Refactor the pmem / nvdimm-bridge functionality from core/bus.c to
core/pmem.c. Introduce drivers/core/core.h to communicate data
structures and helpers between the core bus and other functionality that
registers devices on the bus.
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/162792538899.368511.3881663908293411300.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl/core/core.h')
| -rw-r--r-- | drivers/cxl/core/core.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h new file mode 100644 index 000000000000..49045daf8bd7 --- /dev/null +++ b/drivers/cxl/core/core.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright(c) 2020 Intel Corporation. */ + +#ifndef __CXL_CORE_H__ +#define __CXL_CORE_H__ + +extern const struct device_type cxl_nvdimm_bridge_type; +extern const struct device_type cxl_nvdimm_type; + +extern struct attribute_group cxl_base_attribute_group; + +static inline void unregister_cxl_dev(void *dev) +{ + device_unregister(dev); +} + +#endif /* __CXL_CORE_H__ */ |