diff options
| author | Samuel Holland <samuel@sholland.org> | 2021-11-18 22:35:43 -0600 |
|---|---|---|
| committer | Maxime Ripard <maxime@cerno.tech> | 2021-11-23 10:29:05 +0100 |
| commit | b30fc68e6ce543130cfcf69fb02bafbcf961a7d4 (patch) | |
| tree | e5fb5b105fdf91768d819d7011bd6885c32dc724 /drivers/clk/sunxi-ng/ccu_gate.h | |
| parent | 8107c859a39159872ca45f751c4a70a89abe3321 (diff) | |
| download | lwn-b30fc68e6ce543130cfcf69fb02bafbcf961a7d4.tar.gz lwn-b30fc68e6ce543130cfcf69fb02bafbcf961a7d4.zip | |
clk: sunxi-ng: gate: Add macros for gates with fixed dividers
It is possible to declare a gate with a fixed divider, by using the
CCU_FEATURE_ALL_PREDIV flag. Since this is not obvious, add a macro
for declaring this type of clock.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211119043545.4010-6-samuel@sholland.org
Diffstat (limited to 'drivers/clk/sunxi-ng/ccu_gate.h')
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu_gate.h | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu_gate.h b/drivers/clk/sunxi-ng/ccu_gate.h index c386689a952b..dc05ce06737a 100644 --- a/drivers/clk/sunxi-ng/ccu_gate.h +++ b/drivers/clk/sunxi-ng/ccu_gate.h @@ -53,7 +53,7 @@ struct ccu_gate { } /* - * The following two macros allow the re-use of the data structure + * The following macros allow the re-use of the data structure * holding the parent info. */ #define SUNXI_CCU_GATE_HWS(_struct, _name, _parent, _reg, _gate, _flags) \ @@ -68,6 +68,21 @@ struct ccu_gate { } \ } +#define SUNXI_CCU_GATE_HWS_WITH_PREDIV(_struct, _name, _parent, _reg, \ + _gate, _prediv, _flags) \ + struct ccu_gate _struct = { \ + .enable = _gate, \ + .common = { \ + .reg = _reg, \ + .prediv = _prediv, \ + .features = CCU_FEATURE_ALL_PREDIV, \ + .hw.init = CLK_HW_INIT_HWS(_name, \ + _parent, \ + &ccu_gate_ops, \ + _flags), \ + } \ + } + #define SUNXI_CCU_GATE_DATA(_struct, _name, _data, _reg, _gate, _flags) \ struct ccu_gate _struct = { \ .enable = _gate, \ @@ -81,6 +96,21 @@ struct ccu_gate { } \ } +#define SUNXI_CCU_GATE_DATA_WITH_PREDIV(_struct, _name, _parent, _reg, \ + _gate, _prediv, _flags) \ + struct ccu_gate _struct = { \ + .enable = _gate, \ + .common = { \ + .reg = _reg, \ + .prediv = _prediv, \ + .features = CCU_FEATURE_ALL_PREDIV, \ + .hw.init = CLK_HW_INIT_PARENTS_DATA(_name, \ + _parent, \ + &ccu_gate_ops, \ + _flags), \ + } \ + } + static inline struct ccu_gate *hw_to_ccu_gate(struct clk_hw *hw) { struct ccu_common *common = hw_to_ccu_common(hw); |