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| author | Greentime Hu <greentime.hu@sifive.com> | 2021-05-04 18:59:36 +0800 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2021-05-04 12:26:09 +0100 |
| commit | e4d368e0b632717e57d064ade6afdcf535e58068 (patch) | |
| tree | bae18efe298c9840623027e754f2485213db5ef1 /drivers/clk/sifive/Kconfig | |
| parent | c61287bf17836b67e0b649343778bb4a659bd70d (diff) | |
| download | lwn-e4d368e0b632717e57d064ade6afdcf535e58068.tar.gz lwn-e4d368e0b632717e57d064ade6afdcf535e58068.zip | |
clk: sifive: Use reset-simple in prci driver for PCIe driver
We use reset-simple in this patch so that pcie driver can use
devm_reset_control_get() to get this reset data structure and use
reset_control_deassert() to deassert pcie_power_up_rst_n.
Link: https://lore.kernel.org/r/20210504105940.100004-3-greentime.hu@sifive.com
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/sifive/Kconfig')
| -rw-r--r-- | drivers/clk/sifive/Kconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/sifive/Kconfig b/drivers/clk/sifive/Kconfig index 1c14eb20c066..9132c3c4aa86 100644 --- a/drivers/clk/sifive/Kconfig +++ b/drivers/clk/sifive/Kconfig @@ -10,6 +10,8 @@ if CLK_SIFIVE config CLK_SIFIVE_PRCI bool "PRCI driver for SiFive SoCs" + select RESET_CONTROLLER + select RESET_SIMPLE select CLK_ANALOGBITS_WRPLL_CLN28HPC help Supports the Power Reset Clock interface (PRCI) IP block found in |