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author | Chun-Jie Chen <chun-jie.chen@mediatek.com> | 2022-04-09 21:22:51 +0800 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2022-04-25 16:59:41 -0700 |
commit | a677bdf8b6aeea56bd545f7d7c1dcf18d0538426 (patch) | |
tree | 5c33f0f3667928d7090f76c0309891c865d01c1c /drivers/clk/mediatek/Makefile | |
parent | 8c3adc5d2e14a4c35fcef8afdf777b8d2a99ea60 (diff) | |
download | lwn-a677bdf8b6aeea56bd545f7d7c1dcf18d0538426.tar.gz lwn-a677bdf8b6aeea56bd545f7d7c1dcf18d0538426.zip |
clk: mediatek: Add MT8186 ipesys clock support
Add MT8186 ipesys clock controller which provides clock gate
control for Image Process Engine.
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220409132251.31725-16-chun-jie.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mediatek/Makefile')
-rw-r--r-- | drivers/clk/mediatek/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile index 6902da61e150..caf2ce93d666 100644 --- a/drivers/clk/mediatek/Makefile +++ b/drivers/clk/mediatek/Makefile @@ -75,7 +75,7 @@ obj-$(CONFIG_COMMON_CLK_MT8186) += clk-mt8186-mcu.o clk-mt8186-topckgen.o clk-mt clk-mt8186-apmixedsys.o clk-mt8186-imp_iic_wrap.o \ clk-mt8186-mfg.o clk-mt8186-mm.o clk-mt8186-wpe.o \ clk-mt8186-img.o clk-mt8186-vdec.o clk-mt8186-venc.o \ - clk-mt8186-cam.o clk-mt8186-mdp.o + clk-mt8186-cam.o clk-mt8186-mdp.o clk-mt8186-ipe.o obj-$(CONFIG_COMMON_CLK_MT8192) += clk-mt8192.o obj-$(CONFIG_COMMON_CLK_MT8192_AUDSYS) += clk-mt8192-aud.o obj-$(CONFIG_COMMON_CLK_MT8192_CAMSYS) += clk-mt8192-cam.o |