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author | Joshua Yeong <joshua.yeong@starfivetech.com> | 2024-05-15 13:02:52 +0800 |
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committer | Conor Dooley <conor.dooley@microchip.com> | 2024-05-28 12:34:11 +0100 |
commit | cabff60ca77da6cb460988e2af40bde95776d92b (patch) | |
tree | b997127aa411bd3bb023f43a1ca235317a7b7275 /drivers/cache/Makefile | |
parent | c6005d4dd216a5eb0837432511cc87c9a19c5c9e (diff) | |
download | lwn-cabff60ca77da6cb460988e2af40bde95776d92b.tar.gz lwn-cabff60ca77da6cb460988e2af40bde95776d92b.zip |
cache: Add StarFive StarLink cache management
Add StarFive Starlink cache management driver.
The driver enables RISC-V non-standard cache
operation on SoC that does not support Zicbom
extension instructions.
Signed-off-by: Joshua Yeong <joshua.yeong@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'drivers/cache/Makefile')
-rw-r--r-- | drivers/cache/Makefile | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/cache/Makefile b/drivers/cache/Makefile index 7657cff3bd6c..55c5e851034d 100644 --- a/drivers/cache/Makefile +++ b/drivers/cache/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_AX45MP_L2_CACHE) += ax45mp_cache.o -obj-$(CONFIG_SIFIVE_CCACHE) += sifive_ccache.o +obj-$(CONFIG_AX45MP_L2_CACHE) += ax45mp_cache.o +obj-$(CONFIG_SIFIVE_CCACHE) += sifive_ccache.o +obj-$(CONFIG_STARFIVE_STARLINK_CACHE) += starfive_starlink_cache.o |