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authorAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>2022-05-25 10:57:52 -0400
committerAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>2022-05-26 09:53:01 -0400
commitd8e53d8a4e0ae842ef5e83e0dfb0796980f710cf (patch)
treef728c665e7a46f61fffee46cdb44cfe8f3c851e8 /arch
parent5b9afc161ea595c82707f5f9d67c96a00a8bcbae (diff)
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drm/panfrost: Don't set L2_MMU_CONFIG quirks
L2_MMU_CONFIG is an implementation-defined register. Different Mali GPUs define slightly different MAX_READS and MAX_WRITES fields, which throttle outstanding reads and writes when set to non-zero values. When left as zero, reads and writes are not throttled. Both kbase and panfrost always zero these registers. Per discussion with Steven Price, there are two reasons these quirks may be used: 1. Simulating slower memory subsystems. This use case is only of interest to system-on-chip designers; it is not relevant to mainline. 2. Working around broken memory subsystems. Hopefully we never see this case in mainline. If we do, we'll need to set this register based on an SoC-compatible, rather than generally matching on the GPU model. To the best of our knowledge, these fields are zero at reset, so the write is not necessary. Let's remove the write to aid porting to new Mali GPUs, which have different layouts for the L2_MMU_CONFIG register. Suggested-by: Steven Price <steven.price@arm.com> Reviewed-by: Steven Price <steven.price@arm.com> Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220525145754.25866-8-alyssa.rosenzweig@collabora.com
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