Merge tag 'xtensa-20161005' of git://github.com/jcmvbkbc/linux-xtensa

Pull Xtensa updates from Max Filippov:
 "Updates for the xtensa architecture.  It is a combined set of patches
  for 4.8 that never got to the mainline and new patches for 4.9.

   - add new kernel memory layouts for MMUv3 cores: with 256MB and 512MB
     KSEG size, starting at physical address other than 0

   - make kernel load address configurable

   - clean up kernel memory layout macros

   - drop sysmem early allocator and switch to memblock

   - enable kmemleak and memory reservation from the device tree

   - wire up new syscalls: userfaultfd, membarrier, mlock2,
     copy_file_range, preadv2 and pwritev2

   - add new platform: Cadence Configurable System Platform (CSP) and
     new core variant for it: xt_lnx

   - rearrange CCOUNT calibration code, make most of it generic

   - improve machine reset code (XTFPGA now reboots reliably with MMUv3
     cores)

   - provide default memmap command line option for configurations
     without device tree support

   - ISS fixes: simdisk is now capable of using highmem pages, panic
     correctly terminates simulator"

* tag 'xtensa-20161005' of git://github.com/jcmvbkbc/linux-xtensa: (24 commits)
  xtensa: disable MMU initialization option on MMUv2 cores
  xtensa: add default memmap and mmio32native options to defconfigs
  xtensa: add default memmap option to common_defconfig
  xtensa: add default memmap option to iss_defconfig
  xtensa: ISS: allow simdisk to use high memory buffers
  xtensa: ISS: define simc_exit and use it instead of inline asm
  xtensa: xtfpga: group platform_* functions together
  xtensa: rearrange CCOUNT calibration
  xtensa: xtfpga: use clock provider, don't update DT
  xtensa: Tweak xuartps UART driver Rx watermark for Cadence CSP config.
  xtensa: initialize MMU before jumping to reset vector
  xtensa: fix icountlevel setting in cpu_reset
  xtensa: extract common CPU reset code into separate function
  xtensa: Added Cadence CSP kernel configuration for Xtensa
  xtensa: fix default kernel load address
  xtensa: wire up new syscalls
  xtensa: support reserved-memory DT node
  xtensa: drop sysmem and switch to memblock
  xtensa: minimize use of PLATFORM_DEFAULT_MEM_{ADDR,SIZE}
  xtensa: cleanup MMU setup and kernel layout macros
  ...

1 files changed, 39 insertions, 1 deletions

diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c
index b9ad9feadc2d..9a5bcd0381a7 100644
--- a/arch/xtensa/kernel/time.c
+++ b/arch/xtensa/kernel/time.c
@@ -12,6 +12,8 @@
  * Chris Zankel <chris@zankel.net>
  */
 
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
 #include <linux/errno.h>
 #include <linux/sched.h>
 #include <linux/time.h>
@@ -134,16 +136,52 @@ void local_timer_setup(unsigned cpu)
 					0xf, 0xffffffff);
 }
 
+#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
+#ifdef CONFIG_OF
+static void __init calibrate_ccount(void)
+{
+	struct device_node *cpu;
+	struct clk *clk;
+
+	cpu = of_find_compatible_node(NULL, NULL, "cdns,xtensa-cpu");
+	if (cpu) {
+		clk = of_clk_get(cpu, 0);
+		if (!IS_ERR(clk)) {
+			ccount_freq = clk_get_rate(clk);
+			return;
+		} else {
+			pr_warn("%s: CPU input clock not found\n",
+				__func__);
+		}
+	} else {
+		pr_warn("%s: CPU node not found in the device tree\n",
+			__func__);
+	}
+
+	platform_calibrate_ccount();
+}
+#else
+static inline void calibrate_ccount(void)
+{
+	platform_calibrate_ccount();
+}
+#endif
+#endif
+
 void __init time_init(void)
 {
+	of_clk_init(NULL);
 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
 	printk("Calibrating CPU frequency ");
-	platform_calibrate_ccount();
+	calibrate_ccount();
 	printk("%d.%02d MHz\n", (int)ccount_freq/1000000,
 			(int)(ccount_freq/10000)%100);
 #else
 	ccount_freq = CONFIG_XTENSA_CPU_CLOCK*1000000UL;
 #endif
+	WARN(!ccount_freq,
+	     "%s: CPU clock frequency is not set up correctly\n",
+	     __func__);
 	clocksource_register_hz(&ccount_clocksource, ccount_freq);
 	local_timer_setup(0);
 	setup_irq(this_cpu_ptr(&ccount_timer)->evt.irq, &timer_irqaction);