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| author | Yu Zhang <yu.c.zhang@linux.intel.com> | 2017-08-24 20:27:55 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2017-08-24 18:09:17 +0200 |
| commit | 855feb6736403f398dd43764254c5f0522bfc130 (patch) | |
| tree | dbb18f911167e5ae21423314b6122df1a9e7fb5e /arch/x86/kvm/x86.c | |
| parent | 2a7266a8f9074f03c014dca641721d451881a42b (diff) | |
| download | lwn-855feb6736403f398dd43764254c5f0522bfc130.tar.gz lwn-855feb6736403f398dd43764254c5f0522bfc130.zip | |
KVM: MMU: Add 5 level EPT & Shadow page table support.
Extends the shadow paging code, so that 5 level shadow page
table can be constructed if VM is running in 5 level paging
mode.
Also extends the ept code, so that 5 level ept table can be
constructed if maxphysaddr of VM exceeds 48 bits. Unlike the
shadow logic, KVM should still use 4 level ept table for a VM
whose physical address width is less than 48 bits, even when
the VM is running in 5 level paging mode.
Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
[Unconditionally reset the MMU context in kvm_cpuid_update.
Changing MAXPHYADDR invalidates the reserved bit bitmasks.
- Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/kvm/x86.c')
0 files changed, 0 insertions, 0 deletions