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authorSean Christopherson <sean.j.christopherson@intel.com>2019-09-27 14:45:23 -0700
committerPaolo Bonzini <pbonzini@redhat.com>2019-10-22 13:34:16 +0200
commit34059c2570102870df8d8a31bd42f8d9c19cce87 (patch)
treefadfbbc8af47c7d3b292d0f147aaef904fbf64a8 /arch/x86/kvm/x86.c
parentcb3c1e2f3e8d0a77824c05c7c38f03d2cbdeaf9e (diff)
downloadlwn-34059c2570102870df8d8a31bd42f8d9c19cce87.tar.gz
lwn-34059c2570102870df8d8a31bd42f8d9c19cce87.zip
KVM: x86: Fold decache_cr3() into cache_reg()
Handle caching CR3 (from VMX's VMCS) into struct kvm_vcpu via the common cache_reg() callback and drop the dedicated decache_cr3(). The name decache_cr3() is somewhat confusing as the caching behavior of CR3 follows that of GPRs, RFLAGS and PDPTRs, (handled via cache_reg()), and has nothing in common with the caching behavior of CR0/CR4 (whose decache_cr{0,4}_guest_bits() likely provided the 'decache' verbiage). This would effectivel adds a BUG() if KVM attempts to cache CR3 on SVM. Change it to a WARN_ON_ONCE() -- if the cache never requires filling, the value is already in the right place -- and opportunistically add one in VMX to provide an equivalent check. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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