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| author | Wei Huang <wei.huang2@amd.com> | 2021-01-26 03:18:30 -0500 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-02-04 05:27:28 -0500 |
| commit | 3b9c723ed7cfa4e1eef338afaa57e94be2a60d9c (patch) | |
| tree | 431e6962e29bca958317569f7b820c95fed7d3f2 /arch/x86/kvm/svm/svm.c | |
| parent | 82a11e9c6fa2b50a7fff542fb782359dc1eab6bf (diff) | |
| download | lwn-3b9c723ed7cfa4e1eef338afaa57e94be2a60d9c.tar.gz lwn-3b9c723ed7cfa4e1eef338afaa57e94be2a60d9c.zip | |
KVM: SVM: Add support for SVM instruction address check change
New AMD CPUs have a change that checks #VMEXIT intercept on special SVM
instructions before checking their EAX against reserved memory region.
This change is indicated by CPUID_0x8000000A_EDX[28]. If it is 1, #VMEXIT
is triggered before #GP. KVM doesn't need to intercept and emulate #GP
faults as #GP is supposed to be triggered.
Co-developed-by: Bandan Das <bsd@redhat.com>
Signed-off-by: Bandan Das <bsd@redhat.com>
Signed-off-by: Wei Huang <wei.huang2@amd.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20210126081831.570253-4-wei.huang2@amd.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/kvm/svm/svm.c')
| -rw-r--r-- | arch/x86/kvm/svm/svm.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 073a364f1d1d..0378d423044f 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -1040,6 +1040,9 @@ static __init int svm_hardware_setup(void) } } + if (boot_cpu_has(X86_FEATURE_SVME_ADDR_CHK)) + svm_gp_erratum_intercept = false; + if (vgif) { if (!boot_cpu_has(X86_FEATURE_VGIF)) vgif = false; |