diff options
| author | Suresh Siddha <suresh.b.siddha@intel.com> | 2010-07-19 16:05:52 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2010-07-19 17:52:24 -0700 |
| commit | 6bad06b768920e278c7cedfdda56a0b4c6a35ee9 (patch) | |
| tree | d84dd7d1f0f9afcf4880cea734bf3a32e8e9804c /arch/x86/include/asm/xsave.h | |
| parent | 29104e101d710dd152f807978884643a52eca8b7 (diff) | |
| download | lwn-6bad06b768920e278c7cedfdda56a0b4c6a35ee9.tar.gz lwn-6bad06b768920e278c7cedfdda56a0b4c6a35ee9.zip | |
x86, xsave: Use xsaveopt in context-switch path when supported
xsaveopt is a more optimized form of xsave specifically designed
for the context switch usage. xsaveopt doesn't save the state that's not
modified from the prior xrstor. And if a specific feature state gets
modified to the init state, then xsaveopt just updates the header bit
in the xsave memory layout without updating the corresponding memory
layout.
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
LKML-Reference: <20100719230205.604014179@sbs-t61.sc.intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/x86/include/asm/xsave.h')
| -rw-r--r-- | arch/x86/include/asm/xsave.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/x86/include/asm/xsave.h b/arch/x86/include/asm/xsave.h index 0c72adc0cb15..ec86c5fd6a6e 100644 --- a/arch/x86/include/asm/xsave.h +++ b/arch/x86/include/asm/xsave.h @@ -125,8 +125,11 @@ static inline void fpu_xsave(struct fpu *fpu) { /* This, however, we can work around by forcing the compiler to select an addressing mode that doesn't require extended registers. */ - __asm__ __volatile__(".byte " REX_PREFIX "0x0f,0xae,0x27" - : : "D" (&(fpu->state->xsave)), - "a" (-1), "d"(-1) : "memory"); + alternative_input( + ".byte " REX_PREFIX "0x0f,0xae,0x27", + ".byte " REX_PREFIX "0x0f,0xae,0x37", + X86_FEATURE_XSAVEOPT, + [fx] "D" (&fpu->state->xsave), "a" (-1), "d" (-1) : + "memory"); } #endif |