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authorCyan Yang <cyan.yang@sifive.com>2025-04-18 13:32:29 +0800
committerPalmer Dabbelt <palmer@rivosinc.com>2025-05-08 11:01:43 -0700
commit2d147d77ae6e96c1c349a6ada0eac14111c3384a (patch)
tree8dc09a90008e6ceeea26934a2fc4752e8eee59d1 /arch/riscv/include/asm/vendor_extensions
parent0f733b5be9658b75496127e23e1f7edfc45bb423 (diff)
downloadlwn-2d147d77ae6e96c1c349a6ada0eac14111c3384a.tar.gz
lwn-2d147d77ae6e96c1c349a6ada0eac14111c3384a.zip
riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions
Add SiFive vendor extension support to the kernel with the target of "xsfvqmaccdod" and "xsfvqmaccqoq". Signed-off-by: Cyan Yang <cyan.yang@sifive.com> Link: https://lore.kernel.org/r/20250418053239.4351-3-cyan.yang@sifive.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/include/asm/vendor_extensions')
-rw-r--r--arch/riscv/include/asm/vendor_extensions/sifive.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/vendor_extensions/sifive.h b/arch/riscv/include/asm/vendor_extensions/sifive.h
new file mode 100644
index 000000000000..608004250e2e
--- /dev/null
+++ b/arch/riscv/include/asm/vendor_extensions/sifive.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_RISCV_VENDOR_EXTENSIONS_SIFIVE_H
+#define _ASM_RISCV_VENDOR_EXTENSIONS_SIFIVE_H
+
+#include <asm/vendor_extensions.h>
+
+#include <linux/types.h>
+
+#define RISCV_ISA_VENDOR_EXT_XSFVQMACCDOD 0
+#define RISCV_ISA_VENDOR_EXT_XSFVQMACCQOQ 1
+
+extern struct riscv_isa_vendor_ext_data_list riscv_isa_vendor_ext_list_sifive;
+
+#endif