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| author | Zhang Wei <wei.zhang@freescale.com> | 2007-05-22 11:38:26 +0800 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2007-06-29 01:58:17 -0500 |
| commit | bf7c036fb48a6176635f2e7b749d7398728d4b7d (patch) | |
| tree | 2ee335cc5ae2597e75caaa42254b1ed73484f015 /arch/powerpc/platforms/86xx/pci.c | |
| parent | 0a3786c5f7575c0739ad94057213b931a9423502 (diff) | |
| download | lwn-bf7c036fb48a6176635f2e7b749d7398728d4b7d.tar.gz lwn-bf7c036fb48a6176635f2e7b749d7398728d4b7d.zip | |
[POWERPC] Remove PCI-e errata for MPC8641 silicon ver 1.0
Remove errata for PCI-e support of Rev 1.0 of MPC8641 since its considered
obselete and is not production level silicon from Freescale.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Acked-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/86xx/pci.c')
| -rw-r--r-- | arch/powerpc/platforms/86xx/pci.c | 18 |
1 files changed, 2 insertions, 16 deletions
diff --git a/arch/powerpc/platforms/86xx/pci.c b/arch/powerpc/platforms/86xx/pci.c index 7659259cc974..0db51e8ab5d4 100644 --- a/arch/powerpc/platforms/86xx/pci.c +++ b/arch/powerpc/platforms/86xx/pci.c @@ -133,19 +133,6 @@ mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size) early_write_config_word(hose, 0, 0, PCI_COMMAND, cmd); early_write_config_byte(hose, 0, 0, PCI_LATENCY_TIMER, 0x80); - - /* PCIE Bus, Fix the MPC8641D host bridge's location to bus 0xFF. */ - early_read_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, &temps); - temps = (temps & 0xff000000) | (0xff) | (0x0 << 8) | (0xfe << 16); - early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps); -} - -int mpc86xx_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn) -{ - if (bus == 0 && PCI_SLOT(devfn) == 0) - return PCIBIOS_DEVICE_NOT_FOUND; - - return PCIBIOS_SUCCESSFUL; } int __init mpc86xx_add_bridge(struct device_node *dev) @@ -173,11 +160,10 @@ int __init mpc86xx_add_bridge(struct device_node *dev) return -ENOMEM; hose->arch_data = dev; - /* last_busno = 0xfe cause by MPC8641 PCIE bug */ hose->first_busno = bus_range ? bus_range[0] : 0x0; - hose->last_busno = bus_range ? bus_range[1] : 0xfe; + hose->last_busno = bus_range ? bus_range[1] : 0xff; - setup_indirect_pcie(hose, rsrc.start, rsrc.start + 0x4); + setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4); /* Setup the PCIE host controller. */ mpc86xx_setup_pcie(hose, rsrc.start, rsrc.end - rsrc.start + 1); |