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authorSteven J. Hill <sjhill@mips.com>2012-08-31 16:20:08 -0500
committerSteven J. Hill <sjhill@mips.com>2012-09-13 15:43:50 -0500
commitec167f2d9b9ba784cc17d4449973e68665800388 (patch)
tree4c7d7b29f1ca056e92d03c5b482bf5c711bec8b2 /arch/mips/kernel/irq-gic.c
parent98b67c37db336446fa3a543654c012680bbe2291 (diff)
downloadlwn-ec167f2d9b9ba784cc17d4449973e68665800388.tar.gz
lwn-ec167f2d9b9ba784cc17d4449973e68665800388.zip
MIPS: Add new end of interrupt functionality for GIC.
Each platform should define its own 'gic_finish_irq' function. Signed-off-by: Steven J. Hill <sjhill@mips.com>
Diffstat (limited to 'arch/mips/kernel/irq-gic.c')
-rw-r--r--arch/mips/kernel/irq-gic.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index e9a46d0205a2..c2bec301e7ad 100644
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -195,7 +195,7 @@ static struct irq_chip gic_irq_controller = {
.irq_mask = gic_mask_irq,
.irq_mask_ack = gic_mask_irq,
.irq_unmask = gic_unmask_irq,
- .irq_eoi = gic_unmask_irq,
+ .irq_eoi = gic_finish_irq,
#ifdef CONFIG_SMP
.irq_set_affinity = gic_set_affinity,
#endif