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| author | Tiezhu Yang <yangtiezhu@loongson.cn> | 2026-04-22 15:45:13 +0800 |
|---|---|---|
| committer | Huacai Chen <chenhuacai@loongson.cn> | 2026-04-22 15:45:13 +0800 |
| commit | 1dd3e8a8eeb4059fb34b07578362380cf35b7ed5 (patch) | |
| tree | 4ddfdd91c92f0a267fe52d7e1ba4b7a1e27d034c /arch/loongarch/include/uapi | |
| parent | 2c749f734ebfe350da55bf40ea55444fb85d4055 (diff) | |
| download | lwn-1dd3e8a8eeb4059fb34b07578362380cf35b7ed5.tar.gz lwn-1dd3e8a8eeb4059fb34b07578362380cf35b7ed5.zip | |
LoongArch: Define instruction formats for AM{SWAP/ADD}.{B/H} and DBAR
The 8 and 16 bit read-modify-write atomic instructions amadd.{b/h} and
amswap.{b/h} were newly added in the latest LoongArch Reference Manual,
define the instruction format and check whether support via CPUCFG.
Furthermore, define the instruction format for DBAR which will be used
to support BPF load-acquire and store-release instructions.
This is preparation for later patches.
Acked-by: Hengqi Chen <hengqi.chen@gmail.com>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'arch/loongarch/include/uapi')
| -rw-r--r-- | arch/loongarch/include/uapi/asm/hwcap.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/loongarch/include/uapi/asm/hwcap.h b/arch/loongarch/include/uapi/asm/hwcap.h index 49519b4362c6..90e96113ba51 100644 --- a/arch/loongarch/include/uapi/asm/hwcap.h +++ b/arch/loongarch/include/uapi/asm/hwcap.h @@ -19,5 +19,6 @@ #define HWCAP_LOONGARCH_PTW (1 << 13) #define HWCAP_LOONGARCH_LSPW (1 << 14) #define HWCAP_LOONGARCH_SCQ (1 << 15) +#define HWCAP_LOONGARCH_LAM_BH (1 << 16) #endif /* _UAPI_ASM_HWCAP_H */ |