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author | Kristina Martsenko <kristina.martsenko@arm.com> | 2017-12-13 17:07:19 +0000 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2017-12-22 17:35:55 +0000 |
commit | e6d588a8e3da24ea51321279a064b97feb502ef0 (patch) | |
tree | f2d139841fd94a8479f6f608be311005e5edbec6 /arch/arm64/mm/mmu.c | |
parent | 529c4b05a3cb2f324aac347042ee6d641478e946 (diff) | |
download | lwn-e6d588a8e3da24ea51321279a064b97feb502ef0.tar.gz lwn-e6d588a8e3da24ea51321279a064b97feb502ef0.zip |
arm64: head.S: handle 52-bit PAs in PTEs in early page table setup
The top 4 bits of a 52-bit physical address are positioned at bits
12..15 in page table entries. Introduce a macro to move the bits there,
and change the early ID map and swapper table setup code to use it.
Tested-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Tested-by: Bob Picco <bob.picco@oracle.com>
Reviewed-by: Bob Picco <bob.picco@oracle.com>
Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
[catalin.marinas@arm.com: additional comments for clarification]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/mm/mmu.c')
0 files changed, 0 insertions, 0 deletions