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| author | Vladimir Barinov <vladimir.barinov@cogentembedded.com> | 2016-08-31 13:03:36 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-09-06 12:57:26 +0200 |
| commit | b00d23f71f2cbca63d4d8ddde15b39f18fccd7a8 (patch) | |
| tree | 6111879b46bf379472e0ee9494bea5600d5f7d23 /arch/arm64/boot/dts/renesas | |
| parent | eb3f0f199fc48a813ee8f22212c91d5f8859ff79 (diff) | |
| download | lwn-b00d23f71f2cbca63d4d8ddde15b39f18fccd7a8.tar.gz lwn-b00d23f71f2cbca63d4d8ddde15b39f18fccd7a8.zip | |
arm64: dts: h3ulcb: enable EXTALR clk
This enables EXTALR clock that can be used for the watchdog.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts index 3ba1f72526ba..42a4208f57ed 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts @@ -37,6 +37,10 @@ clock-frequency = <16666666>; }; +&extalr_clk { + clock-frequency = <32768>; +}; + &pfc { pinctrl-0 = <&scif_clk_pins>; pinctrl-names = "default"; |