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author | Frank Li <Frank.Li@nxp.com> | 2024-07-29 14:59:28 -0400 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2024-08-13 15:26:50 +0800 |
commit | c7ad422f0e09f0e2fba6e9b096f7a39ed477481d (patch) | |
tree | 1734431d988a8e20ff3609390cc4bace53a09be3 /arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | |
parent | 8b35a4aceaa111567d5d2385dd10c065ccc96bef (diff) | |
download | lwn-c7ad422f0e09f0e2fba6e9b096f7a39ed477481d.tar.gz lwn-c7ad422f0e09f0e2fba6e9b096f7a39ed477481d.zip |
arm64: dts: layerscape: add msi-cell = <1> for gic its
Add msi-cell = <1> for GIC ITS. msi-parent have to be kept because it is
checked by U-Boot due to historical reasons to fix up msi-map.
Fix below CHECK_DTBS warning:
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb: interrupt-controller@6000000: msi-controller@6020000: '#msi-cells' is a required property
from schema $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v3.yaml
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi index 701f0b2a3e57..5e77c438f884 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi @@ -143,6 +143,7 @@ its: msi-controller@6020000 { compatible = "arm,gic-v3-its"; msi-controller; + #msi-cells = <1>; reg = <0x0 0x06020000 0 0x20000>;/* GIC Translater */ }; }; @@ -661,7 +662,7 @@ bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ - msi-parent = <&its>; + msi-parent = <&its 0>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, @@ -700,7 +701,7 @@ bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ - msi-parent = <&its>; + msi-parent = <&its 0>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, @@ -1079,7 +1080,7 @@ reg = <0x01 0xf0000000 0x0 0x100000>; #address-cells = <3>; #size-cells = <2>; - msi-parent = <&its>; + msi-parent = <&its 0>; device_type = "pci"; bus-range = <0x0 0x0>; dma-coherent; |