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| author | Paul Mundt <lethal@linux-sh.org> | 2011-09-05 12:52:08 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2011-09-05 12:52:08 +0900 |
| commit | f5a18f932e051ff0f19dcd80a421a4dd9b11f10f (patch) | |
| tree | 9189ffc9fa735e5297ed8c3678a9463e8dbb1561 /arch/arm/mm/proc-v7.S | |
| parent | b9a3acf46afdafc601947136f63e9dd228cd86e8 (diff) | |
| parent | 9e79e3e9dd9672b37ac9412e9a926714306551fe (diff) | |
| download | lwn-f5a18f932e051ff0f19dcd80a421a4dd9b11f10f.tar.gz lwn-f5a18f932e051ff0f19dcd80a421a4dd9b11f10f.zip | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into sh-latest
Diffstat (limited to 'arch/arm/mm/proc-v7.S')
| -rw-r--r-- | arch/arm/mm/proc-v7.S | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index a30e78542ccf..9049c0764db2 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -66,6 +66,7 @@ ENDPROC(cpu_v7_proc_fin) ENTRY(cpu_v7_reset) mrc p15, 0, r1, c1, c0, 0 @ ctrl register bic r1, r1, #0x1 @ ...............m + THUMB( bic r1, r1, #1 << 30 ) @ SCTLR.TE (Thumb exceptions) mcr p15, 0, r1, c1, c0, 0 @ disable MMU isb mov pc, r0 @@ -247,13 +248,16 @@ ENTRY(cpu_v7_do_resume) mcr p15, 0, r7, c2, c0, 0 @ TTB 0 mcr p15, 0, r8, c2, c0, 1 @ TTB 1 mcr p15, 0, ip, c2, c0, 2 @ TTB control register - mcr p15, 0, r10, c1, c0, 1 @ Auxiliary control register + mrc p15, 0, r4, c1, c0, 1 @ Read Auxiliary control register + teq r4, r10 @ Is it already set? + mcrne p15, 0, r10, c1, c0, 1 @ No, so write it mcr p15, 0, r11, c1, c0, 2 @ Co-processor access control ldr r4, =PRRR @ PRRR ldr r5, =NMRR @ NMRR mcr p15, 0, r4, c10, c2, 0 @ write PRRR mcr p15, 0, r5, c10, c2, 1 @ write NMRR isb + dsb mov r0, r9 @ control register mov r2, r7, lsr #14 @ get TTB0 base mov r2, r2, lsl #14 |