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authorLinus Torvalds <torvalds@linux-foundation.org>2009-12-12 11:40:13 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2009-12-12 11:40:13 -0800
commit9c3936cb694ffd559c80dc3eb75b61f769a39259 (patch)
treecc034c09e359e43b4ff01efabc7ce47602d80acf /arch/arm/mach-omap2/sdrc.h
parent5de76b18d1a7193c49c1a4ee72261421a17de57c (diff)
parent5ccf197859d6f6bcf56e85657019503b2d95767a (diff)
downloadlwn-9c3936cb694ffd559c80dc3eb75b61f769a39259.tar.gz
lwn-9c3936cb694ffd559c80dc3eb75b61f769a39259.zip
Merge branch 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (75 commits) omap3: Fix OMAP35XX_REV macros omap: serial: fix non-empty uart fifo read abort omap3: Zoom2/3: Update hsmmc board config params omap3 : Enable TWL4030 Keypad for Zoom2 and Zoom3 boards omap3: id code detection 3525 vs 3515 omap3: rx51: Use wl1251 in SPI mode 3 omap3: zoom2/3: make MMC slot work again omap1: htcherald: Update defconfig to include mux support omap1: LCD_DMA: Use some define rather than a hexadecimal omap: header: remove unused data-type omap: arch/arm/plat-omap/devices.c - sort alphabetically omap: Correcting GPMC_CONFIG1_DEVICETYPE_NAND OMAP3: serial - allow platforms specify which UARTs to initialize omap3: cm-t35: add mux initialization OMAP4: Sync up omap4430 defconfig OMAP4: Remove the secondary wait loop OMAP4: AuxCoreBoot registers only accessible in secure mode OMAP4: Fix SRAM base and size OMAP4: Fix cpu detection omap3: pandora: board file updates for .33 ...
Diffstat (limited to 'arch/arm/mach-omap2/sdrc.h')
-rw-r--r--arch/arm/mach-omap2/sdrc.h19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h
index 48207b018989..68f57bb67fc5 100644
--- a/arch/arm/mach-omap2/sdrc.h
+++ b/arch/arm/mach-omap2/sdrc.h
@@ -18,6 +18,9 @@
#include <plat/sdrc.h>
#ifndef __ASSEMBLER__
+
+#include <linux/io.h>
+
extern void __iomem *omap2_sdrc_base;
extern void __iomem *omap2_sms_base;
@@ -56,4 +59,20 @@ static inline u32 sms_read_reg(u16 reg)
OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
#endif /* __ASSEMBLER__ */
+/* Minimum frequency that the SDRC DLL can lock at */
+#define MIN_SDRC_DLL_LOCK_FREQ 83000000
+
+/* Scale factor for fixed-point arith in omap3_core_dpll_m2_set_rate() */
+#define SDRC_MPURATE_SCALE 8
+
+/* 2^SDRC_MPURATE_BASE_SHIFT: MPU MHz that SDRC_MPURATE_LOOPS is defined for */
+#define SDRC_MPURATE_BASE_SHIFT 9
+
+/*
+ * SDRC_MPURATE_LOOPS: Number of MPU loops to execute at
+ * 2^MPURATE_BASE_SHIFT MHz for SDRC to stabilize
+ */
+#define SDRC_MPURATE_LOOPS 96
+
+
#endif