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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-10-14 01:17:18 +0800 |
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committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-11-28 22:50:38 +0800 |
commit | cfa5a1fe7e65bacdee59d5df60a9f44b0c030532 (patch) | |
tree | 9b1f7ec23974b3176e47b4163a0b938e73e105a8 /arch/arm/mach-at91/at91sam9261.c | |
parent | eab5fd67d6d144ae9877a3de307714836bd1fbf0 (diff) | |
download | lwn-cfa5a1fe7e65bacdee59d5df60a9f44b0c030532.tar.gz lwn-cfa5a1fe7e65bacdee59d5df60a9f44b0c030532.zip |
ARM: at91: add ioremap_registers entry point to soc setup
this will allow to ioremap the register of the PIT, PMC and others
and make the code soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/at91sam9261.c')
-rw-r--r-- | arch/arm/mach-at91/at91sam9261.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 574aa6b6a78b..dde831814737 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -285,6 +285,10 @@ static void __init at91sam9261_map_io(void) at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE); } +static void __init at91sam9261_ioremap_registers(void) +{ +} + static void __init at91sam9261_initialize(void) { at91_arch_reset = at91sam9_alt_reset; @@ -341,6 +345,7 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { struct at91_init_soc __initdata at91sam9261_soc = { .map_io = at91sam9261_map_io, .default_irq_priority = at91sam9261_default_irq_priority, + .ioremap_registers = at91sam9261_ioremap_registers, .register_clocks = at91sam9261_register_clocks, .init = at91sam9261_initialize, }; |