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| author | Marek Vasut <marex@denx.de> | 2024-07-05 09:59:10 +0200 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2024-09-05 11:31:55 +0200 |
| commit | b230e1b21c6217647d8452eab4c43420ef02b58d (patch) | |
| tree | 44522ceeaef65300b2b4e221f300fbade3ed40a0 /arch/arm/boot/dts | |
| parent | 8400291e289ee6b2bf9779ff1c83a291501f017b (diff) | |
| download | lwn-b230e1b21c6217647d8452eab4c43420ef02b58d.tar.gz lwn-b230e1b21c6217647d8452eab4c43420ef02b58d.zip | |
ARM: dts: stm32: Keep MDIO bus in AF across suspend DH STM32MP13xx DHCOR DHSBC board
The RTL8211F PHY gets confused when the MDIO bus lines get switched
to ANALOG during suspend/resume cycle. Keep the MDIO and MDC lines
in AF during suspend/resume to avoid confusing the PHY. The PHY can
be brought out of the confused state by restarting auto-negotiation
too, but that seems like an odd workaround and shouldn't be in the
PHY driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi index c9f588a65094..8db1ec4a3b26 100644 --- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi @@ -94,14 +94,20 @@ /omit-if-no-ref/ eth1_rgmii_sleep_pins_a: eth1-rgmii-sleep-0 { pins1 { + pinmux = <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */ + <STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + + pins2 { pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ <STM32_PINMUX('E', 5, ANALOG)>, /* ETH_RGMII_TXD3 */ <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_RGMII_GTX_CLK */ - <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ - <STM32_PINMUX('G', 2, ANALOG)>, /* ETH_MDC */ <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD1 */ @@ -178,14 +184,20 @@ /omit-if-no-ref/ eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 { pins1 { + pinmux = <STM32_PINMUX('B', 6, AF11)>, /* ETH_MDIO */ + <STM32_PINMUX('G', 5, AF10)>; /* ETH_MDC */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + + pins2 { pinmux = <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RGMII_TXD0 */ <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TXD1 */ <STM32_PINMUX('G', 1, ANALOG)>, /* ETH_RGMII_TXD2 */ <STM32_PINMUX('E', 6, ANALOG)>, /* ETH_RGMII_TXD3 */ <STM32_PINMUX('F', 6, ANALOG)>, /* ETH_RGMII_TX_CTL */ <STM32_PINMUX('G', 3, ANALOG)>, /* ETH_RGMII_GTX_CLK */ - <STM32_PINMUX('B', 6, ANALOG)>, /* ETH_MDIO */ - <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_MDC */ <STM32_PINMUX('F', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_RXD1 */ <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ |