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| author | Max Merchel <Max.Merchel@ew.tq-group.com> | 2026-02-20 15:30:05 +0100 |
|---|---|---|
| committer | Frank Li <Frank.Li@nxp.com> | 2026-04-05 21:35:28 -0400 |
| commit | 24d209d1a1e8d3ac684422fc9859df95ecaf03b5 (patch) | |
| tree | 83fd1ef914c27f33eeda50cf8d01d54d1b049fd0 /arch/arm/boot/dts/nxp | |
| parent | c335bc0640784df933e60ae704453fdf186ba8da (diff) | |
| download | lwn-24d209d1a1e8d3ac684422fc9859df95ecaf03b5.tar.gz lwn-24d209d1a1e8d3ac684422fc9859df95ecaf03b5.zip | |
ARM: dts: imx6qdl-mba6: add boot phase properties
dtschema/schemas/bootph.yaml describe various node usage during
boot phases with DT.
MBa6 need I2C, GPIO, SD-Card, UART and watchdog access during
boot process.
Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/nxp')
| -rw-r--r-- | arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi index ee2c6bec92e8..74ccfe56828f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi @@ -206,6 +206,10 @@ }; }; +&gpio1 { + bootph-pre-ram; +}; + &hdmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hdmi>; @@ -214,6 +218,8 @@ }; &i2c1 { + bootph-pre-ram; + tlv320aic32x4: audio-codec@18 { compatible = "ti,tlv320aic32x4"; reg = <0x18>; @@ -274,6 +280,7 @@ &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; + bootph-pre-ram; status = "okay"; }; @@ -346,6 +353,7 @@ no-sdio; cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + bootph-all; status = "okay"; }; @@ -354,6 +362,7 @@ pinctrl-0 = <&pinctrl_wdog1>; /* does not work on unmodified starter kit */ /* fsl,ext-reset-output; */ + bootph-pre-ram; status = "okay"; }; @@ -544,6 +553,7 @@ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b099 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b099 >; + bootph-pre-ram; }; pinctrl_uart3: uart3grp { @@ -587,6 +597,7 @@ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b099 /* usdhc2 CD */ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x0001b099 /* usdhc2 WP */ >; + bootph-all; }; pinctrl_usbotg: usbotggrp { @@ -602,5 +613,6 @@ /* Watchdog out */ MX6QDL_PAD_SD1_DAT2__WDOG1_B 0x0000b099 >; + bootph-pre-ram; }; }; |