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| author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2011-10-12 11:57:54 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-10-12 11:48:46 +0100 |
| commit | 31b402e3c9eb839a00530511dcf7de47bbf723f6 (patch) | |
| tree | 8f5a00e067ef4d647727425b7e40c501286f7284 /README | |
| parent | 1e036f65329901a2432c92132b785654944743d9 (diff) | |
| download | lwn-31b402e3c9eb839a00530511dcf7de47bbf723f6.tar.gz lwn-31b402e3c9eb839a00530511dcf7de47bbf723f6.zip | |
MFD: twl6040: Cache the vibra control registers
The vibra control register will be used from the ASoC codec driver as well.
In order to avoid latency issues caused by I2C read access, cache the two
control register within the core driver, so we do not need to reach out
to the chip to read it back.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Samuel Ortiz <samuel.ortiz@intel.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'README')
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