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author | James Hogan <james.hogan@imgtec.com> | 2014-11-13 10:25:11 -0300 |
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committer | Wolfram Sang <wsa@the-dreams.de> | 2014-11-17 19:54:24 +0100 |
commit | 039e60ed6cb6715d168943de99a4aececcb65e15 (patch) | |
tree | 34b9f260ff37ed6b6227a46ef0cd84fd69b75b58 /Documentation | |
parent | 48ef3ca98d92201c36f50ffb5409c38b02e2e953 (diff) | |
download | lwn-039e60ed6cb6715d168943de99a4aececcb65e15.tar.gz lwn-039e60ed6cb6715d168943de99a4aececcb65e15.zip |
DT: i2c: Add binding document for IMG I2C SCB
Introduce a devicetree binding for Imagination Technologies
I2C SCB controller.
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/i2c/i2c-img-scb.txt | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/i2c/i2c-img-scb.txt b/Documentation/devicetree/bindings/i2c/i2c-img-scb.txt new file mode 100644 index 000000000000..b6461602dca5 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-img-scb.txt @@ -0,0 +1,26 @@ +IMG Serial Control Bus (SCB) I2C Controller + +Required Properties: +- compatible: "img,scb-i2c" +- reg: Physical base address and length of controller registers +- interrupts: Interrupt number used by the controller +- clocks : Should contain a clock specifier for each entry in clock-names +- clock-names : Should contain the following entries: + "scb", for the SCB core clock. + "sys", for the system clock. +- clock-frequency: The I2C bus frequency in Hz +- #address-cells: Should be <1> +- #size-cells: Should be <0> + +Example: + +i2c@18100000 { + compatible = "img,scb-i2c"; + reg = <0x18100000 0x200>; + interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&i2c0_clk>, <&system_clk>; + clock-names = "scb", "sys"; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; +}; |